Granted “Joint research and development of a compiler backend for Secure Open Architecture and the design and development of a supported runtime environment”, commissioned by NEDO

Granted “Joint research and development of a compiler backend for Secure Open Architecture and the design and development of a supported runtime environment”, commissioned by NEDO

—- Research and development of OS and development tools for RISC-V core, a rapidly growing open processor IP, and establishment of a ecosystem with domestic vendors —-

 

NSITEXE, Inc. (Head Office: Minato-ku, Tokyo; President: Yukihide Niimi) announced today that Eureka Corporation (Head Office: Nagoya City, Aichi Prefecture; President: Shoji Hatano), Kyoto Microcomputer Corporation (Head Office: Kyoto City, Kyoto Prefecture; President: Shoichi Yamamoto) and eSol Coorporation (Head Office: Nakano-ku, Tokyo; President and CEO: Katsutoshi Hasegawa) have jointly received a grant from the New Energy and Industrial Technology Development Organization (hereinafter referred to as “NEDO”) in July 2020 to develop next-generation computing technologies for AI chips that enable highly efficient and high-speed processing. This project is one of the development themes of “Development Business / Development of Innovative AI Edge Computing Technology” (hereinafter referred to as “this project”).
This project aims to develop OS and development tools for the existing RISC-V systems that are required for domestic use, and to promote the adoption of RISC-V as a standard of open architecture. Also, by promoting this project with the leading Japanese embedded tool vendors, we aim to establish a ecosystem for RISC-V, an open processor IP that is expected to grow rapidly.

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Based on the existing RISC-V development tools, this project develops and evaluates the current lacking features of OS and development tools to satisfy the requirements of users.
Particularly, we emphasis that we ensure processing efficiency and real-time performance, which are important for embedded systems to be competitive.
After the completion of the project, we will strongly support the utilization of RISC-V by both domestic and overseas manufacturers of embedded systems by providing support and business development services to each company.

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NSITEXE develops the parallel programming environment required in multi-core RISC-V systems. Specifically, NSITEXE implements an OpenMP-based directive programming environment for migration of existing software assets, and OpenCL and SYCL programming environment for new application softwares such as neural networks and automated driving. NSITEXE contributes to the development of the RISC-V community through activities to incorporate the knowledge gained through this research and development into standards.