NSITEXE DFP architecture
MIMD-based high-performance embedded vector processor
- MIMD fashioned system
- Multiple Instruction stream, Multiple Data stream
- Easy to utilize both Data-Level and Task-Level Parallelism
- Flexible thread control
- Special hardware assists thread scheduling software for flexible and efficient
- Wide-SIMD vector processing unit
- Efficiently exploit Data-Level Parallelism
- Shared vector processing unit
- High pipeline utilization by hardware multi-threading

Vector Execution unit + Multi thread
meets a wide range of future application requirements
meets a wide range of future application requirements

DR 1st Gen
DR 2nd Gen